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YMF724F

DS-1

YAMAHA

CORPORATION

September 21, 1998

Preliminary

OVERVIEW

YMF724F (DS-1) is a high performance audio controller for the PCI Bus. DS-1 consists of two separated

functional blocks. One is the PCI Audio block and the other is the Legacy Audio block. PCI Audio block

allows Software Driver to handle maximum of 73 concurrent audio streams with the Bus Master DMA engine.

The PCI Audio Engine converts the sampling rate of each audio stream and the streams are mixed without

utilizing the CPU or causing system latency. By using the Software Driver from YAMAHA, PCI Audio

provides 64-voice XG wavetable synthesizer with Reverb and variation. It also supports DirectSound hardware

accelerator, Downloadable Sound (DLS) and DirectMusic accelerator.

Legacy Audio block supports OPL3, Sound Blaster Pro, MPU401 UART mode and Joystick function in order

to provide hardware compatibility for numerous PC games on real DOS without any software driver. To

achieve legacy DMAC compatibility on the PCI, DS-1 supports both PC/PCI and Distributed DMA protocols.

DS-1 also supports Serialized IRQ for legacy IRQ compatibility.

DS-1 supports the connection to YAMAHA YMF730 (AC-2) which provides high quality DAC, ADC and

analog mixing. In addition, it supports consumer IEC958, Audio Digital Interface (SPDIF) output, for high-

quality, external audio amplification.

FEATURES

• PCI 2.1 Compliant

• PC’97/PC’98 specification Compliant

• PCI Bus Power Management rev. 1.0 Compliant

(Support D0, D2 and D3 state)

• PCI Bus Master for PCI Audio

True Full Duplex Playback and Capture with

different Sampling Rate

Maximum 64-voice XG capital Wavetable

Synthesizer including GM compatibility

DirectSound Hardware Acceleration

DirectMusic Hardware Acceleration

Downloadable Sound (DLS) level-1

• Legacy Audio compatibility

Genuine OPL3

Hardware Sound Blaster Pro compatibility

MPU401 UART mode MIDI interface

Joystick

• Supports PC/PCI and Distributed DMA for legacy

DMAC (8237) emulation

• Supports Serialized IRQ

• Supports YAMAHA AC-3 device (YMF727 :

AC3F2) interface to enable AC-3 decode

• Supports Consumer IEC958 Output (SPDIF) port

• Supports AC-2 Interface (AC-Link)

• Hardware Volume Control

• EEPROM Interface

• Single Crystal operation (24.576MHz)

• 5V Power supply for I/O. 3.3V Power supply for

Internal core logic

• 144-pin LQFP (YMF724F-V)

The contents of this catalog are target specifications and are subject to change

without prior notice. When using this device, please recheck the specifications.

1 2 3 4 5 6 ... 49 50

CORPORATION 1
YMF724F 10

Podsumowanie treści

Strona 1 - CORPORATION

YMF724FDS-1YAMAHACORPORATIONSeptember 21, 1998PreliminaryOVERVIEWYMF724F (DS-1) is a high performance audio controller for the PCI Bus. DS-1 consists

Strona 2

YMF724F September 21, 1998-10-1-2. PCI Configuration RegisterIn addition to the Configuration Register defined by PCI Revision

Strona 3

YMF724F September 21, 1998-11-00 - 01h: Vendor IDRead OnlyDefault: 1073hAccess Bus Width: 8, 16, 32-bitb15 b14 b13 b12 b11 b10

Strona 4

YMF724F September 21, 1998-12-b8...SER: SERR# EnableThis bit enables DS-1 to drive SERR#. “0”: Do not drive SERR

Strona 5

YMF724F September 21, 1998-13-08h: Revision IDRead OnlyDefault: 03hAccess Bus Width: 8, 16, 32-bitb7 b6 b5 b4 b3 b2 b1 b0Revis

Strona 6

YMF724F September 21, 1998-14-0Dh: Latency TimerRead / WriteDefault: 00hAccess Bus Width: 8, 16, 32-bitb7 b6 b5 b4 b3 b2 b1 b0

Strona 7

YMF724F September 21, 1998-15-2C-2Dh: Subsystem Vendor IDRead OnlyDefault: 1073hAccess Bus Width: 8, 16, 32-bitb15 b14 b13 b12

Strona 8

YMF724F September 21, 1998-16-3Ch: Interrupt LineRead / WriteDefault: 00hAccess Bus Width: 8, 16, 32-bitb7 b6 b5 b4 b3 b2 b1 b

Strona 9

YMF724F September 21, 1998-17-40 - 41h: Legacy Audio ControlRead / WriteDefault: 907FhAccess Bus Width: 8, 16, 32-bitb15 b14 b

Strona 10 - YMF724F

YMF724F September 21, 1998-18-b[7:6] ...SDMA: Sound Blaster DMA-8 Channel SelectThese bits select the DMA channel for t

Strona 11

YMF724F September 21, 1998-19-42 - 43h: Extended Legacy Audio ControlRead / WriteDefault: 0000hAccess Bus Width: 8, 16, 32-bit

Strona 12

YMF724F September 21, 1998-2-LOGOS1. GM system level 1GM system level 1 is a world standard format about MIDI synthesizer whic

Strona 13

YMF724F September 21, 1998-20-b[12:11] ...SMOD: SB DMA modeThese bits determine the protocol to achieve the DMAC(8237) func

Strona 14

YMF724F September 21, 1998-21-46-47h: Subsystem ID Write RegisterRead / WriteDefault: 000DhAccess Bus Width: 16-bitb15 b14 b13

Strona 15

YMF724F September 21, 1998-22-b2...DPLL1: Disable PLL1 Clock OscillationSetting this bit to “1” disables the osci

Strona 16

YMF724F September 21, 1998-23-b12...PR4: AC-2 Power down Control 4This bit controls the power state of the AC-link

Strona 17

YMF724F September 21, 1998-24-4C-4Dh: D-DMA Slave ConfigurationRead / WriteDefault: 0000hAccess Bus Width: 8, 16, 32-bitb15 b1

Strona 18

YMF724F September 21, 1998-25-51h: Next Item PointerRead OnlyDefault: 00hAccess Bus Width: 8, 16, 32-bitb7 b6 b5 b4 b3 b2 b1 b

Strona 19

YMF724F September 21, 1998-26-54-55h: Power Management Control / StatusRead / WriteDefault: 0000hAccess Bus Width: 8, 16, 32-b

Strona 20

YMF724F September 21, 1998-27-2. ISA Compatible DeviceDS-1 contains the following functions to maintain the compatibility with

Strona 21

YMF724F September 21, 1998-28-DS-1 supports PC/PCI and D-DMA protocols to emulate the DMA of SB Pro on the PCI. In addition

Strona 22

YMF724F September 21, 1998-29-2-1. OPL3 BlockOPL3 Block is register compatible with YMF289B. However, Power Management regist

Strona 23

YMF724F September 21, 1998-3-PIN CONFIGURATIONYMF724F-VGP4GP5GP6GP7RXDTXDROMDO/VOLDW#ROMSK/VOLUP#VDD5VDD3VSSVSSIRQ5IRQ7IRQ9IRQ

Strona 24

YMF724F September 21, 1998-30-2-1-2. OPL3 Data RegisterOPL3 Data Register Array 0 (R/W):AddressD7D6D5D4D3D2D1D000 - 01h LSI TE

Strona 25

YMF724F September 21, 1998-31-2-2. Sound Blaster Pro BlockThis block emulates the DSP commands of Sound Blaster and Sound Blas

Strona 26

YMF724F September 21, 1998-32-2-2-1. DSP CommandThe following shows the list of DSP Commands that are supported by the SB Pro

Strona 27

YMF724F September 21, 1998-33-2-2-2. Sound Blaster Pro MixerThe following shows the register map of the Mixer section of Sound

Strona 28

YMF724F September 21, 1998-34-(1) Volume for MIDIMIDI Vol. (26h)01234567mute mute mute mute mute mute mute mute00000h 0000h 00

Strona 29

YMF724F September 21, 1998-35-2-2-3. SB Suspend / ResumeThe SB block can read the internal state as to support Suspend and Res

Strona 30

YMF724F September 21, 1998-36-F1h: Scan In/ Out DataRead / WriteDefault: 00hb7 b6 b5 b4 b3 b2 b1 b0SCAN DATAb[7:0] ...S

Strona 31

YMF724F September 21, 1998-37-2-3. MPU401This block is for transmitting and receiving MIDI data. It is compatible with UART

Strona 32

YMF724F September 21, 1998-38-3. DMA Emulation ProtocolThe former synthesizer LSI for the ISA bus such as the Sound Blaster us

Strona 33

YMF724F September 21, 1998-39-3-2. D-DMADS-1 provides the following registers to support D-DMA. D-DMA Slave Configuration R

Strona 34

YMF724F September 21, 1998-4-PIN DESCRIPTION1. PCI Bus Interface (53-pin)name I/O Type Size functionPCICLK I P PCI ClockRST# I

Strona 35

YMF724F September 21, 1998-40-4. Interrupt RoutingDS-1 supports three types of interrupts, interrupt signal on the PCI bus (IN

Strona 36

YMF724F September 21, 1998-41-6. Hardware Volume ControlThe hardware volume control determines the AC-2 master volume without

Strona 37

YMF724F September 21, 1998-42-ELECTRICAL CHARACTERISTICS1. Absolute Maximum RatingsItem Symbol Min. Max. Unit Power Supply Vo

Strona 38

YMF724F September 21, 1998-43-3. DC Characteristics Item Symbol Condition Min. Typ. Max. Unit High Level Input Voltage 1 VIH

Strona 39

YMF724F September 21, 1998-44-4. AC Characteristics 4-1. Master Clock (Fig.1)Item Symbol Min. Typ. Max. UnitXI24 Cycle Time

Strona 40

YMF724F September 21, 1998-45-4-3. PCI Interface (Fig.3, 4)Item Symbol Condition Min. Typ. Max. UnitPCICLK Cycle Time tPCYC3

Strona 41

YMF724F September 21, 1998-46-4-4. AC-2 / AC3F2 Master Clock (Fig.5)Item Symbol Min. Typ. Max. UnitCMCLK Cycle Time tCMCYC-

Strona 42

YMF724F September 21, 1998-47-CBCLKCSYNCCSDICSDO0.8 V1.5 V2.0 V0.8 V2.0 V0.8 V2.0 V0.8 V1.5 V2.0 VtCBIHIGHtCVALtCBILOWtCBICYCt

Strona 43

YMF724F September 21, 1998-48-ASCLKACDIACS, ACDO2.0 V0.8 V2.0 V0.8 V0.8 V1.5 V2.0 VtASCHIGHtASCLOWtASCCYCtACVALtACOHtACISUtACI

Strona 44

YMF724F September 21, 1998-49-EXTERNAL DIMENSIONSYMF724F-V(1.00)0-10˚0.50±0.20LEAD THICKNESS : 0.15+0.10 -0.06 20.00±0.3022.00

Strona 45

YMF724F September 21, 1998-5-3. YMF727(AC3F2) Interface (9-pin)name I/O type size functionXRST# O C 2mA Reset for local device

Strona 46

YMF724F September 21, 1998-50-IMPORTANT NOTICE1. Yamaha reserves the right to make changes to its Products and to this documen

Strona 47

YMF724F September 21, 1998-6-6. Miscellaneous (15-pin)name I/O type Size functionROMCS O T 3mA Chip select for external EEPROM

Strona 48

YMF724F September 21, 1998-7-BLOCK DIAGRAMPCI Bus InterfaceBUS MasterDMA Controller MemoryXG SynthesizerDirect Sound Acc. Wav

Strona 49

YMF724F September 21, 1998-8-SYSTEM DIAGRAMWaveInDeviceWaveOutDeviceMidiOutDeviceXG/DLSEngineDS-1 Slot Manager (Up to 64-sound

Strona 50

YMF724F September 21, 1998-9-FUNCTION OVERVIEW1. PCI INTERFACEDS-1 supports the PCI bus interface and complies to PCI revision

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